Searched hist:a82a427da447f04e8385434b08970df4a51d05d1 (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/drivers/ram/rockchip/ |
| H A D | sdram-px30-ddr3-detect-333.inc | a82a427da447f04e8385434b08970df4a51d05d1 Tue Aug 28 09:13:15 UTC 2018 YouMin Chen <cym@rock-chips.com> driver: ram: rockhip: px30: fix auto power down issue
1.The recommends value of dfi_tlp_resp is 7.
2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
gate memory clock when enter power down.
Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
Signed-off-by: YouMin Chen <cym@rock-chips.com>
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| H A D | sdram-px30-lpddr2-detect-333.inc | a82a427da447f04e8385434b08970df4a51d05d1 Tue Aug 28 09:13:15 UTC 2018 YouMin Chen <cym@rock-chips.com> driver: ram: rockhip: px30: fix auto power down issue
1.The recommends value of dfi_tlp_resp is 7.
2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
gate memory clock when enter power down.
Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
Signed-off-by: YouMin Chen <cym@rock-chips.com>
|
| H A D | sdram-px30-ddr4-detect-333.inc | a82a427da447f04e8385434b08970df4a51d05d1 Tue Aug 28 09:13:15 UTC 2018 YouMin Chen <cym@rock-chips.com> driver: ram: rockhip: px30: fix auto power down issue
1.The recommends value of dfi_tlp_resp is 7.
2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
gate memory clock when enter power down.
Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
Signed-off-by: YouMin Chen <cym@rock-chips.com>
|
| H A D | sdram-px30-lpddr3-detect-333.inc | a82a427da447f04e8385434b08970df4a51d05d1 Tue Aug 28 09:13:15 UTC 2018 YouMin Chen <cym@rock-chips.com> driver: ram: rockhip: px30: fix auto power down issue
1.The recommends value of dfi_tlp_resp is 7.
2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
gate memory clock when enter power down.
Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
Signed-off-by: YouMin Chen <cym@rock-chips.com>
|
| H A D | sdram_px30.c | a82a427da447f04e8385434b08970df4a51d05d1 Tue Aug 28 09:13:15 UTC 2018 YouMin Chen <cym@rock-chips.com> driver: ram: rockhip: px30: fix auto power down issue
1.The recommends value of dfi_tlp_resp is 7.
2.Set PHY_REG07[7] to 1 for off digit module clock when enter power down.
3.Force set DDR3 or DDR4 active_ranks to 3 to workaround the issue of
gate memory clock when enter power down.
Change-Id: Iea4dd5554a7c527053c91ab7bd0a9db8c8223b59
Signed-off-by: YouMin Chen <cym@rock-chips.com>
|