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/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch3.ha758177f9b9a567df2e8e6e57ac905ada24d8d9c Wed Jun 08 02:31:42 UTC 2016 Yunhui Cui <yunhui.cui@nxp.com> armv8/ls2080a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dcpu.ca758177f9b9a567df2e8e6e57ac905ada24d8d9c Wed Jun 08 02:31:42 UTC 2016 Yunhui Cui <yunhui.cui@nxp.com> armv8/ls2080a: configure PMU's PCTBENR to enable WDT

The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>