Searched hist:a62b1b31d845e8ade7ee2d36068118d097247a6b (Results 1 – 1 of 1) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_x2.S | a62b1b31d845e8ade7ee2d36068118d097247a6b Fri Apr 14 10:26:16 UTC 2023 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> refactor(cpus): convert the Cortex-x2 to use the errata framework
This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive
It is important to note that the errata workaround sequences remain unchanged and preserve their git blame.
Testing was conducted by: * Building for release with all errata flags enabled and running script in change 19136 to compare output of objdump for each errata.
* Testing via script was not complete, as it directed to verify the check and the workaround functions of few erratas manually.
* Manual comparison of disassembly of converted functions with non- converted functions
aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf
* Manual comparison of disassembly of both both files(bl31.elf) ensured,the ported changes were identical and hence verified.
* Build for release with all errata flags enabled and run default tftf tests.
CROSS_COMPILE=aarch64-none-elf- \ make PLAT=fvp \ ARCH=aarch64 \ DEBUG=0 \ HW_ASSISTED_COHERENCY=1 \ USE_COHERENT_MEM=0 \ CTX_INCLUDE_AARCH32_REGS=0 \ ERRATA_X2_2002765=1 \ ERRATA_X2_2017096=1 \ ERRATA_X2_2058056=1 \ ERRATA_X2_2081180=1 \ ERRATA_X2_2083908=1 \ ERRATA_X2_2147715=1 \ ERRATA_X2_2216384=1 \ ERRATA_X2_2282622=1 \ ERRATA_X2_2371105=1 \ ERRATA_X2_2768515=1 \ WORKAROUND_CVE_2022_23960=1 \ ERRATA_DSU_2313941=1 \ BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \ fip all -j12
* Build for debug with all errata enabled and step through ArmDS at reset to ensure that if Errata are applicable then the workaround functions are entered precisely.
Change-Id: Icd2268cdf27f41240c92e3df23b5ad22f3ce3124 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
|