Searched hist:a4f4dfa12c9f2e7b4995cdba704904ea1a920454 (Results 1 – 2 of 2) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | RK3326MINIALL_SLC.ini | a4f4dfa12c9f2e7b4995cdba704904ea1a920454 Tue May 21 09:11:28 UTC 2019 Tang Yun ping <typ@rock-chips.com> rk3326: ddr: update ddr init bin to v1.12
print info: print info: DDR Version 1.12 20190528
from commit:
cbe7c08 rk3326: ddr: init code update to v1.12
update feature:
6e65fc3 rk3326: ddr: enable 2T mode for DDR3
4bd8b62 RK3326: ddr: fix wrong uart base address for atags
Change-Id: I56b0d05320adaadc773ed585c816265c605604a8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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| H A D | RK3326MINIALL.ini | a4f4dfa12c9f2e7b4995cdba704904ea1a920454 Tue May 21 09:11:28 UTC 2019 Tang Yun ping <typ@rock-chips.com> rk3326: ddr: update ddr init bin to v1.12
print info: print info: DDR Version 1.12 20190528
from commit:
cbe7c08 rk3326: ddr: init code update to v1.12
update feature:
6e65fc3 rk3326: ddr: enable 2T mode for DDR3
4bd8b62 RK3326: ddr: fix wrong uart base address for atags
Change-Id: I56b0d05320adaadc773ed585c816265c605604a8
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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