Searched hist:a20a4c6a7be461eed68d73dafa707a3e9dce768f (Results 1 – 2 of 2) sorted by relevance
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| H A D | PX30MINIALL_SLC.ini | a20a4c6a7be461eed68d73dafa707a3e9dce768f Mon May 11 12:11:17 UTC 2020 Tang Yun ping <typ@rock-chips.com> px30: ddr: update ddr bin to v1.15
print info: DDR V1.15 20200511
build from:
cfe1927 rk3326/px30: ddr: updata to v1.15 20200511
update feature:
fix uart0/uart5 clk select and iomux bug.
Change-Id: I2fbe6d306baa3ee4111e75489b83c50187ed89c3
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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| H A D | PX30MINIALL.ini | a20a4c6a7be461eed68d73dafa707a3e9dce768f Mon May 11 12:11:17 UTC 2020 Tang Yun ping <typ@rock-chips.com> px30: ddr: update ddr bin to v1.15
print info: DDR V1.15 20200511
build from:
cfe1927 rk3326/px30: ddr: updata to v1.15 20200511
update feature:
fix uart0/uart5 clk select and iomux bug.
Change-Id: I2fbe6d306baa3ee4111e75489b83c50187ed89c3
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
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