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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.imx5 | 9db1bfa110ac411ab3468e817f7f74b2439eb8c8 Wed Jul 13 21:11:53 UTC 2011 David Jander <david@protonic.nl> ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
Signed-off-by: David Jander <david@protonic.nl>
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx5/ |
| H A D | imx-regs.h | 9db1bfa110ac411ab3468e817f7f74b2439eb8c8 Wed Jul 13 21:11:53 UTC 2011 David Jander <david@protonic.nl> ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
Signed-off-by: David Jander <david@protonic.nl>
|