Searched hist:"984 b1f51b6f8a845b217bfac83dff09b2495104a" (Results 1 – 4 of 4) sorted by relevance
| /rkbin/RKBOOT/ |
| H A D | RK3326AARCH32MINIALL_SLC.ini | 984b1f51b6f8a845b217bfac83dff09b2495104a Mon Jan 11 10:14:17 UTC 2021 Zhihuan He <huan.he@rock-chips.com> rk3326: ddr: update ddr bin to v1.16
build from:
2f76446 rk3326/px30: ddr: updata to v1.16 20210528
update feature:
69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
1e8bea7 rk3326/px30: ddr: add support ssmod
8c20176 rk3326/px30: ddr: add DPLL power down and up
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id6ed6c9fa52e460b95c05292ec9c9c50d74de188
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| H A D | RK3326AARCH32MINIALL.ini | 984b1f51b6f8a845b217bfac83dff09b2495104a Mon Jan 11 10:14:17 UTC 2021 Zhihuan He <huan.he@rock-chips.com> rk3326: ddr: update ddr bin to v1.16
build from:
2f76446 rk3326/px30: ddr: updata to v1.16 20210528
update feature:
69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
1e8bea7 rk3326/px30: ddr: add support ssmod
8c20176 rk3326/px30: ddr: add DPLL power down and up
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id6ed6c9fa52e460b95c05292ec9c9c50d74de188
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| H A D | RK3326MINIALL_SLC.ini | 984b1f51b6f8a845b217bfac83dff09b2495104a Mon Jan 11 10:14:17 UTC 2021 Zhihuan He <huan.he@rock-chips.com> rk3326: ddr: update ddr bin to v1.16
build from:
2f76446 rk3326/px30: ddr: updata to v1.16 20210528
update feature:
69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
1e8bea7 rk3326/px30: ddr: add support ssmod
8c20176 rk3326/px30: ddr: add DPLL power down and up
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id6ed6c9fa52e460b95c05292ec9c9c50d74de188
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| H A D | RK3326MINIALL.ini | 984b1f51b6f8a845b217bfac83dff09b2495104a Mon Jan 11 10:14:17 UTC 2021 Zhihuan He <huan.he@rock-chips.com> rk3326: ddr: update ddr bin to v1.16
build from:
2f76446 rk3326/px30: ddr: updata to v1.16 20210528
update feature:
69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
1e8bea7 rk3326/px30: ddr: add support ssmod
8c20176 rk3326/px30: ddr: add DPLL power down and up
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id6ed6c9fa52e460b95c05292ec9c9c50d74de188
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