Searched hist:"97 bf85d784fbed485e652eb907589ad0d5cb7262" (Results 1 – 1 of 1) sorted by relevance
| /rk3399_rockchip-uboot/drivers/mtd/ |
| H A D | cfi_flash.c | 97bf85d784fbed485e652eb907589ad0d5cb7262 Fri Mar 28 19:40:19 UTC 2008 Daniel Hellstrom <daniel@gaisler.com> MTD/CFI: flash_read64 is defined a weak function (for SPARC)
SPARC has implemented __raw_readq, it reads 64-bit from any 32-bit address. SPARC CPUs implement flash_read64 which calls __raw_readq.
For current SPARC architectures (LEON2 and LEON3) each read from the FLASH must lead to a cache miss. This is because FLASH can not be set non-cacheable since program code resides there, and alternatively disabling cache is poor from performance view, or doing a cache flush between each read is even poorer.
Forcing a cache miss on a SPARC is done by a special instruction "lda" - load alternative space, the alternative space number (ASI) is processor implementation spcific and can be found by including <asm/processor.h>.
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
|