Searched hist:"967 efcae9060af5a7cda3376c9f203b7e7bfc16e" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/include/ |
| H A D | spi-mem.h | 967efcae9060af5a7cda3376c9f203b7e7bfc16e Thu Aug 16 15:30:11 UTC 2018 Boris Brezillon <boris.brezillon@bootlin.com> UPSTREAM: spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Change-Id: I5b907d51232777b54366a589a75b3b1ce1f54dd2
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e0bc8d8542f7bd34e5a6722d3ae41bcf9ca044af)
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| H A D | spi.h | 967efcae9060af5a7cda3376c9f203b7e7bfc16e Thu Aug 16 15:30:11 UTC 2018 Boris Brezillon <boris.brezillon@bootlin.com> UPSTREAM: spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Change-Id: I5b907d51232777b54366a589a75b3b1ce1f54dd2
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e0bc8d8542f7bd34e5a6722d3ae41bcf9ca044af)
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| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | spi-mem.c | 967efcae9060af5a7cda3376c9f203b7e7bfc16e Thu Aug 16 15:30:11 UTC 2018 Boris Brezillon <boris.brezillon@bootlin.com> UPSTREAM: spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Change-Id: I5b907d51232777b54366a589a75b3b1ce1f54dd2
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e0bc8d8542f7bd34e5a6722d3ae41bcf9ca044af)
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| H A D | Kconfig | 967efcae9060af5a7cda3376c9f203b7e7bfc16e Thu Aug 16 15:30:11 UTC 2018 Boris Brezillon <boris.brezillon@bootlin.com> UPSTREAM: spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Change-Id: I5b907d51232777b54366a589a75b3b1ce1f54dd2
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e0bc8d8542f7bd34e5a6722d3ae41bcf9ca044af)
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| H A D | Makefile | 967efcae9060af5a7cda3376c9f203b7e7bfc16e Thu Aug 16 15:30:11 UTC 2018 Boris Brezillon <boris.brezillon@bootlin.com> UPSTREAM: spi: Extend the core to ease integration of SPI memory controllers
Some controllers are exposing high-level interfaces to access various
kind of SPI memories. Unfortunately they do not fit in the current
spi_controller model and usually have drivers placed in
drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI
memories in general.
This is an attempt at defining a SPI memory interface which works for
all kinds of SPI memories (NORs, NANDs, SRAMs).
Change-Id: I5b907d51232777b54366a589a75b3b1ce1f54dd2
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit e0bc8d8542f7bd34e5a6722d3ae41bcf9ca044af)
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