Searched hist:"9319 a756fffb0aae21adcd7caf8674411a22c165" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/include/dt-bindings/pinctrl/ |
| H A D | at91.h | 9319a756fffb0aae21adcd7caf8674411a22c165 Thu Mar 23 04:44:37 UTC 2017 Wenyou Yang <wenyou.yang@atmel.com> pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| /rk3399_rockchip-uboot/arch/arm/mach-at91/include/mach/ |
| H A D | at91_pio.h | 9319a756fffb0aae21adcd7caf8674411a22c165 Thu Mar 23 04:44:37 UTC 2017 Wenyou Yang <wenyou.yang@atmel.com> pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| /rk3399_rockchip-uboot/drivers/pinctrl/ |
| H A D | pinctrl-at91.c | 9319a756fffb0aae21adcd7caf8674411a22c165 Thu Mar 23 04:44:37 UTC 2017 Wenyou Yang <wenyou.yang@atmel.com> pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| H A D | Makefile | 9319a756fffb0aae21adcd7caf8674411a22c165 Thu Mar 23 04:44:37 UTC 2017 Wenyou Yang <wenyou.yang@atmel.com> pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|
| H A D | Kconfig | 9319a756fffb0aae21adcd7caf8674411a22c165 Thu Mar 23 04:44:37 UTC 2017 Wenyou Yang <wenyou.yang@atmel.com> pinctrl: at91: add pinctrl driver
AT91 PIO controller is a combined gpio-controller, pin-mux and
pin-config module. The peripheral's pins are assigned through
per-pin based muxing logic.
Each SoC will have to describe the its limitation and pin
configuration via device tree. This will allow to do not need
to touch the C code when adding new SoC if the IP version is
supported.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
|