Searched hist:"923 cda8ffee4de7918c4aab1c360be42257747ac" (Results 1 – 3 of 3) sorted by relevance
| /rkbin/doc/release/ |
| H A D | RK3588_CN.md | 923cda8ffee4de7918c4aab1c360be42257747ac Wed Sep 04 07:51:27 UTC 2024 XiaoDong Huang <derrick.huang@rock-chips.com> rk3588: bl31: update version to v1.47
Build from ATF commit:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
update feature:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
02316fa91 OPTEE: Explicitly allow NS preemption for Yielding SMCs
80be9361b fix(ehf): restrict secure world FIQ routing model to SPM_MM
0b9727031 fix(bl31): allow use of EHF with S-EL2 SPMC
b6a7886d0 plat: rk3588: dmc: restore PHY OFFSET_DQ_CON0 during resume
e8673d54b plat: rk3588: add dvfs/periodic trn for resume code
0fa6615d0 plat: rk3588: Add support to reset vop sub mem pd when resume
9aa39b9ab plat: rk3588: support access_mem_os_reg
ba6ef224d rockchip: common: add ACCESS_MEM_OS_REG define
37e7e8941 plat: rk3588: sleep: fix GPIO_DBCLK_DIV_CON configuration flow
5fb78cd64 rockchip: uart: switch to loopback mode before checking busy status
02ff3b0da rockchip: uart: save uart register once
0f24f44c5 plat: rk3588: ddr_mcu: remove DDRPHY DLL lock_value_init_override toggle
5f3bb53fa plat: rk3588: use psci_aff_info_state to check cpu off
Change-Id: I8c5c672da05d3b903f0f68343b7a71e011689218
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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| H A D | RK3588_EN.md | 923cda8ffee4de7918c4aab1c360be42257747ac Wed Sep 04 07:51:27 UTC 2024 XiaoDong Huang <derrick.huang@rock-chips.com> rk3588: bl31: update version to v1.47
Build from ATF commit:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
update feature:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
02316fa91 OPTEE: Explicitly allow NS preemption for Yielding SMCs
80be9361b fix(ehf): restrict secure world FIQ routing model to SPM_MM
0b9727031 fix(bl31): allow use of EHF with S-EL2 SPMC
b6a7886d0 plat: rk3588: dmc: restore PHY OFFSET_DQ_CON0 during resume
e8673d54b plat: rk3588: add dvfs/periodic trn for resume code
0fa6615d0 plat: rk3588: Add support to reset vop sub mem pd when resume
9aa39b9ab plat: rk3588: support access_mem_os_reg
ba6ef224d rockchip: common: add ACCESS_MEM_OS_REG define
37e7e8941 plat: rk3588: sleep: fix GPIO_DBCLK_DIV_CON configuration flow
5fb78cd64 rockchip: uart: switch to loopback mode before checking busy status
02ff3b0da rockchip: uart: save uart register once
0f24f44c5 plat: rk3588: ddr_mcu: remove DDRPHY DLL lock_value_init_override toggle
5f3bb53fa plat: rk3588: use psci_aff_info_state to check cpu off
Change-Id: I8c5c672da05d3b903f0f68343b7a71e011689218
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
|
| /rkbin/RKTRUST/ |
| H A D | RK3588TRUST.ini | 923cda8ffee4de7918c4aab1c360be42257747ac Wed Sep 04 07:51:27 UTC 2024 XiaoDong Huang <derrick.huang@rock-chips.com> rk3588: bl31: update version to v1.47
Build from ATF commit:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
update feature:
92b1674a5 plat: rk3588: sleep: config cpu_wakeup according to boot_cpu
02316fa91 OPTEE: Explicitly allow NS preemption for Yielding SMCs
80be9361b fix(ehf): restrict secure world FIQ routing model to SPM_MM
0b9727031 fix(bl31): allow use of EHF with S-EL2 SPMC
b6a7886d0 plat: rk3588: dmc: restore PHY OFFSET_DQ_CON0 during resume
e8673d54b plat: rk3588: add dvfs/periodic trn for resume code
0fa6615d0 plat: rk3588: Add support to reset vop sub mem pd when resume
9aa39b9ab plat: rk3588: support access_mem_os_reg
ba6ef224d rockchip: common: add ACCESS_MEM_OS_REG define
37e7e8941 plat: rk3588: sleep: fix GPIO_DBCLK_DIV_CON configuration flow
5fb78cd64 rockchip: uart: switch to loopback mode before checking busy status
02ff3b0da rockchip: uart: save uart register once
0f24f44c5 plat: rk3588: ddr_mcu: remove DDRPHY DLL lock_value_init_override toggle
5f3bb53fa plat: rk3588: use psci_aff_info_state to check cpu off
Change-Id: I8c5c672da05d3b903f0f68343b7a71e011689218
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
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