Home
last modified time | relevance | path

Searched hist:"90 dec21c9a11f8f826b157c2aa56af458e401d3b" (Results 1 – 10 of 10) sorted by relevance

/rkbin/bin/rk35/
HDrk3506b_ddr_750MHz_v1.06.bin90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
HDrk3506b_ddr_750MHz_rt_v1.06.bin90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
HDrk3506_ddr_750MHz_v1.06.bin90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
HDrk3506_ddr_750MHz_rt_v1.06.bin90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
/rkbin/RKBOOT/
H A DRK3506BMINIALL_RT.ini90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
H A DRK3506MINIALL_RT.ini90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
H A DRK3506MINIALL.ini90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
H A DRK3506BMINIALL.ini90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
/rkbin/doc/release/
H A DRK3506_EN.md90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4
H A DRK3506_CN.md90dec21c9a11f8f826b157c2aa56af458e401d3b Tue Mar 11 07:03:08 UTC 2025 Tang Yun ping <typ@rock-chips.com> rk3506: ddr: update ddrbin to v1.06

bulid from:
d27ac532c4 dram_init: rk3506: update ddrbin to v1.06

update feature:
Fixed the SPI flash loading failure in SPL caused by
abnormal reset of hp_timer clock source

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Idbd304bd7bc50fa790f0d8e8218545d96ff533b4