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| H A D | plat_sip_calls.c | 8f0e22d56092ff104ddfe7cbb86c003261bfdb67 Mon Dec 10 21:28:25 UTC 2018 Varun Wadekar <vwadekar@nvidia.com> Tegra194: SiP function ID to read SMMU_PER registers
This patch introduces SiP function ID, 0xC200FF00, to read SMMU_PER
error records from all supported SMMU blocks.
The register values are passed over to the client via CPU registers
X1 - X3, where
X1 = SMMU_PER[instance #1] | SMMU_PER[instance #0]
X2 = SMMU_PER[instance #3] | SMMU_PER[instance #2]
X3 = SMMU_PER[instance #5] | SMMU_PER[instance #4]
Change-Id: Id56263f558838ad05f6021f8432e618e99e190fc
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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