Searched hist:"8 d6c99c66f94c78e65fdacca2fb2857101f8a5e7" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-uniphier/ |
| H A D | memconf.c | 8d6c99c66f94c78e65fdacca2fb2857101f8a5e7 Sun Jan 15 05:59:04 UTC 2017 Masahiro Yamada <yamada.masahiro@socionext.com> ARM: uniphier: refactor MEMCONF init code
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.
There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
- DRAM 3 channels: sLD3
- DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20
All of them can be moved into a single file by a little more
refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| H A D | Makefile | 8d6c99c66f94c78e65fdacca2fb2857101f8a5e7 Sun Jan 15 05:59:04 UTC 2017 Masahiro Yamada <yamada.masahiro@socionext.com> ARM: uniphier: refactor MEMCONF init code
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.
There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
- DRAM 3 channels: sLD3
- DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20
All of them can be moved into a single file by a little more
refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|
| H A D | init.h | 8d6c99c66f94c78e65fdacca2fb2857101f8a5e7 Sun Jan 15 05:59:04 UTC 2017 Masahiro Yamada <yamada.masahiro@socionext.com> ARM: uniphier: refactor MEMCONF init code
Currently, memconf-sld3.c and memconf-pxs2.c duplicate the code.
There are 3 patterns in terms of MEMCONF init:
- DRAM 2 channels: LD4, sLD8, Pro4, Pro5, LD11
- DRAM 3 channels: sLD3
- DRAM 3 channels (Ch2 is disable by MEMCONF[21]): Pxs2, LD20
All of them can be moved into a single file by a little more
refactoring.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
|