Searched hist:"85056932 f2bad4b6749d42c983d2219ae70fa741" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/drivers/misc/ |
| H A D | winbond_w83627.c | 85056932f2bad4b6749d42c983d2219ae70fa741 Tue Jan 19 13:05:10 UTC 2016 Stefan Roese <sr@denx.de> misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| H A D | Kconfig | 85056932f2bad4b6749d42c983d2219ae70fa741 Tue Jan 19 13:05:10 UTC 2016 Stefan Roese <sr@denx.de> misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| H A D | Makefile | 85056932f2bad4b6749d42c983d2219ae70fa741 Tue Jan 19 13:05:10 UTC 2016 Stefan Roese <sr@denx.de> misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|
| /rk3399_rockchip-uboot/include/ |
| H A D | winbond_w83627.h | 85056932f2bad4b6749d42c983d2219ae70fa741 Tue Jan 19 13:05:10 UTC 2016 Stefan Roese <sr@denx.de> misc: Add simple driver to enable the legacy UART on Winbond Super IO chips
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
|