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| /optee_os/core/drivers/clk/sam/ |
| H A D | sama7g5_clk.c | 83aae07d23bd4e58193ae0f847211fc3ee1e6946 Sat Oct 12 07:28:37 UTC 2024 Tony Han <tony.han@microchip.com> drivers: clk: sam: rename the sama7g5 UTMI clocks for USB PHY
The UTMI clocks for USB PHY are handled in OP-TEE due to they are
controlled by the registers from RSTC (reset controller) which is
always-secured.
SCMI "reset domain management protocol" makes it prossible to handle the
resets from the kernel running in normal world. So the code in kernel for
these clocks need to be enabled. Here renaming the clocks to avoid
registering them failed from the kernel.
Signed-off-by: Tony Han <tony.han@microchip.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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