Searched hist:"831 c068fcfe7d32e48a8b9052a137701b41c7d86" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/ |
| H A D | mp.c | 831c068fcfe7d32e48a8b9052a137701b41c7d86 Mon Oct 26 11:47:57 UTC 2015 Hou Zhiqiang <B48286@freescale.com> armv8/ls1043a: Enable secondary cores
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| /rk3399_rockchip-uboot/include/configs/ |
| H A D | ls1043a_common.h | 831c068fcfe7d32e48a8b9052a137701b41c7d86 Mon Oct 26 11:47:57 UTC 2015 Hou Zhiqiang <B48286@freescale.com> armv8/ls1043a: Enable secondary cores
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|
| /rk3399_rockchip-uboot/arch/arm/ |
| H A D | Kconfig | 831c068fcfe7d32e48a8b9052a137701b41c7d86 Mon Oct 26 11:47:57 UTC 2015 Hou Zhiqiang <B48286@freescale.com> armv8/ls1043a: Enable secondary cores
After the secondary cores enter U-Boot, use CONFIG_ARMV8_MULTIENTRY to
make secondary cores excute in spin loop.
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
|