Searched hist:"803 efaeca961c63160f209d646636453135c31bc" (Results 1 – 3 of 3) sorted by relevance
| /rkbin/RKTRUST/ |
| H A D | RK3576TRUST.ini | 803efaeca961c63160f209d646636453135c31bc Tue Apr 23 11:03:00 UTC 2024 Finley Xiao <finley.xiao@rock-chips.com> rk3576: bl31: update version to v1.05
Build from ATF commit:
76e9c9f54 plat: rk3576: clock: Don't use unclean src for cpu
update feature:
76e9c9f54 plat: rk3576: clock: Don't use unclean src for cpu
f4925b4c3 plat: rk3576: dmc: fix the error of pclk_ddr during DMC initialization
4ea5fdfa4 plat: rk3576: dmc: avoid the change of dfi_init_complete single during DLL lock
c0669333e plat: rk3576: clock: Adjust pvtpll table by otp opp info
36e212aa3 plat: rk3576: Add otp init
b8395a5db plat: rockchip: rk3576: clock: Increase pvptll length for middle frequencies
6c1d820b3 plat: rockchip: rk3576: Fix cpu frequecy error when suspend and resume
371ede2b2 plat: rk3576: enable pd_gpu repair
7d37489fd plat: rk3576: sleep: clear PMU0_DDR_RET_CON1
45d8816cb plat: rk3576: hptimer: support 1G frequency
52d698d5a rockchip: hptimer_v2: config T24_GCD/T32_GCD according to frequency
cafe351b4 rockchip: support non-24M counter
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I0ac6821d3badcb1de65b3aaf717bb35fab71eb73
|
| /rkbin/doc/release/ |
| H A D | RK3576_CN.md | 803efaeca961c63160f209d646636453135c31bc Tue Apr 23 11:03:00 UTC 2024 Finley Xiao <finley.xiao@rock-chips.com> rk3576: bl31: update version to v1.05
Build from ATF commit:
76e9c9f54 plat: rk3576: clock: Don't use unclean src for cpu
update feature:
76e9c9f54 plat: rk3576: clock: Don't use unclean src for cpu
f4925b4c3 plat: rk3576: dmc: fix the error of pclk_ddr during DMC initialization
4ea5fdfa4 plat: rk3576: dmc: avoid the change of dfi_init_complete single during DLL lock
c0669333e plat: rk3576: clock: Adjust pvtpll table by otp opp info
36e212aa3 plat: rk3576: Add otp init
b8395a5db plat: rockchip: rk3576: clock: Increase pvptll length for middle frequencies
6c1d820b3 plat: rockchip: rk3576: Fix cpu frequecy error when suspend and resume
371ede2b2 plat: rk3576: enable pd_gpu repair
7d37489fd plat: rk3576: sleep: clear PMU0_DDR_RET_CON1
45d8816cb plat: rk3576: hptimer: support 1G frequency
52d698d5a rockchip: hptimer_v2: config T24_GCD/T32_GCD according to frequency
cafe351b4 rockchip: support non-24M counter
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I0ac6821d3badcb1de65b3aaf717bb35fab71eb73
|
| H A D | RK3576_EN.md | 803efaeca961c63160f209d646636453135c31bc Tue Apr 23 11:03:00 UTC 2024 Finley Xiao <finley.xiao@rock-chips.com> rk3576: bl31: update version to v1.05
Build from ATF commit:
76e9c9f54 plat: rk3576: clock: Don't use unclean src for cpu
update feature:
76e9c9f54 plat: rk3576: clock: Don't use unclean src for cpu
f4925b4c3 plat: rk3576: dmc: fix the error of pclk_ddr during DMC initialization
4ea5fdfa4 plat: rk3576: dmc: avoid the change of dfi_init_complete single during DLL lock
c0669333e plat: rk3576: clock: Adjust pvtpll table by otp opp info
36e212aa3 plat: rk3576: Add otp init
b8395a5db plat: rockchip: rk3576: clock: Increase pvptll length for middle frequencies
6c1d820b3 plat: rockchip: rk3576: Fix cpu frequecy error when suspend and resume
371ede2b2 plat: rk3576: enable pd_gpu repair
7d37489fd plat: rk3576: sleep: clear PMU0_DDR_RET_CON1
45d8816cb plat: rk3576: hptimer: support 1G frequency
52d698d5a rockchip: hptimer_v2: config T24_GCD/T32_GCD according to frequency
cafe351b4 rockchip: support non-24M counter
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I0ac6821d3badcb1de65b3aaf717bb35fab71eb73
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