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/rk3399_rockchip-uboot/arch/arm/cpu/armv7/
H A Dnonsec_virt.S800c83522ca6a7d6fd0b058f423501b4cc52d6d6 Sat Jul 12 13:23:59 UTC 2014 Marc Zyngier <marc.zyngier@arm.com> ARM: HYP/non-sec: add a barrier after setting SCR.NS==1

A CP15 instruction execution can be reordered, requiring an
isb to be sure it is executed in program order.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>