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| H A D | common.h | 7f1913938984ef6c6a46cb53e003719196d9c5de Fri Sep 07 16:20:23 UTC 2007 Grzegorz Bernacki <gjb@semihalf.com> [PPC440SPe] Improve PCIe configuration space access
- correct configuration space mapping
- correct bus numbering
- better access to config space
Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
first device on the first bus. We now allow to configure up to 16 buses;
also, scanning for devices behind the PCIe-PCIe bridge is supported, so
peripheral devices farther in hierarchy can be identified.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
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