Searched hist:"7 db077f2e3116cc47d9a146f39555559faef42d7" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/ |
| H A D | platform_t210.mk | 7db077f2e3116cc47d9a146f39555559faef42d7 Wed Feb 14 04:31:12 UTC 2018 Varun Wadekar <vwadekar@nvidia.com> Tegra210: support for cluster idle from the CPU
This patch adds support to enter/exit to/from cluster idle power
state on Tegra210 platforms that do not load BPMP firmware.
The CPU initates the cluster idle sequence on the last standing
CPU, by following these steps:
Entry
-----
* stop other CPUs from waking up
* program the PWM pinmux to tristate for OVR PMIC
* program the flow controller to enter CC6 state
* skip L1 $ flush during cluster power down, as L2 $ is inclusive
of L1 $ on Cortex-A57 CPUs
Exit
----
* program the PWM pinmux to un-tristate for OVR PMIC
* allow other CPUs to wake up
This patch also makes sure that cluster idle state entry is not
enabled until CL-DVFS is ready.
Change-Id: I54cf31bf72b4a09d9bf9d2baaed6ee5a963c7808
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | plat_psci_handlers.c | 7db077f2e3116cc47d9a146f39555559faef42d7 Wed Feb 14 04:31:12 UTC 2018 Varun Wadekar <vwadekar@nvidia.com> Tegra210: support for cluster idle from the CPU
This patch adds support to enter/exit to/from cluster idle power
state on Tegra210 platforms that do not load BPMP firmware.
The CPU initates the cluster idle sequence on the last standing
CPU, by following these steps:
Entry
-----
* stop other CPUs from waking up
* program the PWM pinmux to tristate for OVR PMIC
* program the flow controller to enter CC6 state
* skip L1 $ flush during cluster power down, as L2 $ is inclusive
of L1 $ on Cortex-A57 CPUs
Exit
----
* program the PWM pinmux to un-tristate for OVR PMIC
* allow other CPUs to wake up
This patch also makes sure that cluster idle state entry is not
enabled until CL-DVFS is ready.
Change-Id: I54cf31bf72b4a09d9bf9d2baaed6ee5a963c7808
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/include/t210/ |
| H A D | tegra_def.h | 7db077f2e3116cc47d9a146f39555559faef42d7 Wed Feb 14 04:31:12 UTC 2018 Varun Wadekar <vwadekar@nvidia.com> Tegra210: support for cluster idle from the CPU
This patch adds support to enter/exit to/from cluster idle power
state on Tegra210 platforms that do not load BPMP firmware.
The CPU initates the cluster idle sequence on the last standing
CPU, by following these steps:
Entry
-----
* stop other CPUs from waking up
* program the PWM pinmux to tristate for OVR PMIC
* program the flow controller to enter CC6 state
* skip L1 $ flush during cluster power down, as L2 $ is inclusive
of L1 $ on Cortex-A57 CPUs
Exit
----
* program the PWM pinmux to un-tristate for OVR PMIC
* allow other CPUs to wake up
This patch also makes sure that cluster idle state entry is not
enabled until CL-DVFS is ready.
Change-Id: I54cf31bf72b4a09d9bf9d2baaed6ee5a963c7808
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|