"790f7719e2635a3ff3f44473b060e01b5b5ebf74" (history) in projects: rk3399_rockchip-uboot

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Searched hist:"790 f7719e2635a3ff3f44473b060e01b5b5ebf74" (Results 1 – 5 of 5) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A D	pinmux-common.c	`790f7719e2635a3ff3f44473b060e01b5b5ebf74 Tue Feb 24 21:08:29 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: account for different drivegroup base registers Tegra210 starts its drive group registers at a different offset from the APB MISC register block that other SoCs. Update the code to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>`
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra124/
H A D	pinmux.h	`790f7719e2635a3ff3f44473b060e01b5b5ebf74 Tue Feb 24 21:08:29 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: account for different drivegroup base registers Tegra210 starts its drive group registers at a different offset from the APB MISC register block that other SoCs. Update the code to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>`
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra20/
H A D	pinmux.h	`790f7719e2635a3ff3f44473b060e01b5b5ebf74 Tue Feb 24 21:08:29 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: account for different drivegroup base registers Tegra210 starts its drive group registers at a different offset from the APB MISC register block that other SoCs. Update the code to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>`
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra114/
H A D	pinmux.h	`790f7719e2635a3ff3f44473b060e01b5b5ebf74 Tue Feb 24 21:08:29 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: account for different drivegroup base registers Tegra210 starts its drive group registers at a different offset from the APB MISC register block that other SoCs. Update the code to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>`
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra30/
H A D	pinmux.h	`790f7719e2635a3ff3f44473b060e01b5b5ebf74 Tue Feb 24 21:08:29 UTC 2015 Stephen Warren <swarren@nvidia.com> ARM: tegra: pinmux: account for different drivegroup base registers Tegra210 starts its drive group registers at a different offset from the APB MISC register block that other SoCs. Update the code to handle this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>`