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/rkbin/RKBOOT/
H A DRK3568MINIALL_PCIE_EP.ini78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
H A DRK3568MINIALL_RAMBOOT.ini78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
H A DRK3568MINIALL_SPI_NAND.ini78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
H A DRK3568MINIALL_NAND.ini78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
H A DRK3568MINIALL.ini78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
/rkbin/doc/release/
H A DRK3568_EN.md78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
H A DRK3568_CN.md78360f09420c9c90ea544f6e6a364bbea41999b1 Fri Jun 21 02:28:21 UTC 2024 Tang Yun ping <typ@rock-chips.com> rk3568: ddr: update ddrbin to v1.22

build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail

build command:
./make.sh rk3568

update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.

Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a