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H A Dddr_spd.h73b5396b25c52463aa71c782316e2d77a4b8d5ed Fri Aug 17 08:22:37 UTC 2012 York Sun <yorksun@freescale.com> powerpc/mpc8xxx: Add fine timing support for DDR3

When the DDR3 speed goes higher, we need to utilize fine offset
from SPD.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>