Home
last modified time | relevance | path

Searched hist:"70 ed80af46e58a25d472362fe5552e1e49eaf25b" (Results 1 – 1 of 1) sorted by relevance

/rk3399_rockchip-uboot/drivers/ddr/altera/
H A Dsequencer.c70ed80af46e58a25d472362fe5552e1e49eaf25b Mon Apr 04 19:16:18 UTC 2016 Marek Vasut <marex@denx.de> ddr: altera: Zero DM IN delay in scc_mgr_zero_group()

This one last set of delay configuration registers was not properly
zeroed out originally, fix it and zero them out.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Chin Liang See <clsee@altera.com>