| /rk3399_ARM-atf/include/lib/el3_runtime/ |
| H A D | context_el1.h | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/make_helpers/ |
| H A D | arch_features.mk | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/common/ |
| H A D | feat_detect.c | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/include/arch/aarch64/ |
| H A D | arch_helpers.h | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| H A D | arch_features.h | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| H A D | arch.h | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/lib/el3_runtime/aarch64/ |
| H A D | context_mgmt.c | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/docs/getting_started/ |
| H A D | build-options.rst | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/plat/arm/board/fvp/ |
| H A D | platform.mk | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|
| /rk3399_ARM-atf/ |
| H A D | Makefile | 6d0433f04045f52856ecb837efc873a5504d9fa2 Thu Sep 05 21:24:04 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> feat(the): add support for FEAT_THE
Arm v8.9 introduces FEAT_THE, adding Translation Hardening Extension
Read-Check-Write mask registers, RCWMASK_EL1 and RCWSMASK_EL1.
Support this, context switching the registers and disabling
traps so lower ELs can access the new registers.
Change the FVP platform to default to handling this as a dynamic option
so the right decision can be made by the code at runtime.
Change-Id: I8775787f523639b39faf61d046ef482f73b2a562
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
|