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| /optee_os/core/arch/riscv/kernel/ |
| H A D | boot.c | 6ce6769f4633c09968e0f3c4e32005a8c9ca7bd1 Mon Mar 03 05:51:58 UTC 2025 Alvin Chang <alvinga@andestech.com> core: riscv: Preparation to support CFG_BOOT_MEM
Refer to commit d461c892a15a ("core: arm: enable CFG_BOOT_MEM
unconditionally") and commit f12843460d47 ("core: mm: allocate
temporary memory map array"), call the boot_mem_*() functions as
needed from entry.S and boot.c for RISC-V architecture.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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| H A D | entry.S | 6ce6769f4633c09968e0f3c4e32005a8c9ca7bd1 Mon Mar 03 05:51:58 UTC 2025 Alvin Chang <alvinga@andestech.com> core: riscv: Preparation to support CFG_BOOT_MEM
Refer to commit d461c892a15a ("core: arm: enable CFG_BOOT_MEM
unconditionally") and commit f12843460d47 ("core: mm: allocate
temporary memory map array"), call the boot_mem_*() functions as
needed from entry.S and boot.c for RISC-V architecture.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
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