Searched hist:"6 cadaa046b196bebebd7acb13edd840bcfef98e2" (Results 1 – 6 of 6) sorted by relevance
| /rk3399_rockchip-uboot/drivers/clk/at91/ |
| H A D | Kconfig | 6cadaa046b196bebebd7acb13edd840bcfef98e2 Tue Sep 27 03:00:29 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> clk: at91: Improve the clock implementation
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
|
| H A D | clk-system.c | 6cadaa046b196bebebd7acb13edd840bcfef98e2 Tue Sep 27 03:00:29 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> clk: at91: Improve the clock implementation
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
|
| H A D | pmc.h | 6cadaa046b196bebebd7acb13edd840bcfef98e2 Tue Sep 27 03:00:29 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> clk: at91: Improve the clock implementation
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
|
| H A D | clk-peripheral.c | 6cadaa046b196bebebd7acb13edd840bcfef98e2 Tue Sep 27 03:00:29 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> clk: at91: Improve the clock implementation
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
|
| H A D | clk-generated.c | 6cadaa046b196bebebd7acb13edd840bcfef98e2 Tue Sep 27 03:00:29 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> clk: at91: Improve the clock implementation
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
|
| H A D | pmc.c | 6cadaa046b196bebebd7acb13edd840bcfef98e2 Tue Sep 27 03:00:29 UTC 2016 Wenyou Yang <wenyou.yang@atmel.com> clk: at91: Improve the clock implementation
For the peripheral clock, provide the clock ops for the clock
provider, such as spi0_clk. The .of_xlate is to get the clk->id,
the .enable is to enable the spi0 peripheral clock, the .get_rate
is to get the clock frequency.
The driver for periph32ck node is responsible for recursively
binding its children as clk devices, not provide the clock ops.
So do the generated clock and system clock.
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
|