Searched hist:"6 b9e309a8a7f0f33252288f0ed8794a83a488301" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/drivers/ddr/fsl/ |
| H A D | main.c | 6b9e309a8a7f0f33252288f0ed8794a83a488301 Mon Feb 10 21:59:43 UTC 2014 York Sun <yorksun@freescale.com> Driver/ddr: Add support of different DDR base address
DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.
Signed-off-by: York Sun <yorksun@freescale.com>
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| /rk3399_rockchip-uboot/ |
| H A D | README | 6b9e309a8a7f0f33252288f0ed8794a83a488301 Mon Feb 10 21:59:43 UTC 2014 York Sun <yorksun@freescale.com> Driver/ddr: Add support of different DDR base address
DDR base address has been the same from the view of core and DDR
controllers. This has changed for Freescale ARM-based SoCs. Controllers
setup DDR memory in a contiguous space and cores view it at separated
locations.
Signed-off-by: York Sun <yorksun@freescale.com>
|