Searched hist:"699 c4e592b32f43d4ba2cc0d53848118a77d590a" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/arch/arc/cpu/arcv2/ |
| H A D | ivt.S | 699c4e592b32f43d4ba2cc0d53848118a77d590a Thu Aug 04 06:21:50 UTC 2016 Alexey Brodkin <abrodkin@synopsys.com> arc: Update exception & interrupt handling for ARCv2
Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.
Now we update it with more ARCv2 specific vectors like
* Software Interrupt
* Division by zero
* Data cache consistency error
* Misaligned access
Also normal interrupts are now implemented properly and extened to
all possible 240 items.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
|
| /rk3399_rockchip-uboot/arch/arc/lib/ |
| H A D | ints_low.S | 699c4e592b32f43d4ba2cc0d53848118a77d590a Thu Aug 04 06:21:50 UTC 2016 Alexey Brodkin <abrodkin@synopsys.com> arc: Update exception & interrupt handling for ARCv2
Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.
Now we update it with more ARCv2 specific vectors like
* Software Interrupt
* Division by zero
* Data cache consistency error
* Misaligned access
Also normal interrupts are now implemented properly and extened to
all possible 240 items.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
|
| H A D | interrupts.c | 699c4e592b32f43d4ba2cc0d53848118a77d590a Thu Aug 04 06:21:50 UTC 2016 Alexey Brodkin <abrodkin@synopsys.com> arc: Update exception & interrupt handling for ARCv2
Initially IVT for ARCv2 was simply copypasted from ARCompact
with some selected fixes so basic stuff works.
Now we update it with more ARCv2 specific vectors like
* Software Interrupt
* Division by zero
* Data cache consistency error
* Misaligned access
Also normal interrupts are now implemented properly and extened to
all possible 240 items.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
|