Searched hist:"6995 a2893718a54cbd255ea3dd9b6d7306e30cf2" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-am33xx/ |
| H A D | sys_proto.h | 6995a2893718a54cbd255ea3dd9b6d7306e30cf2 Thu Aug 09 18:29:57 UTC 2012 Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> am33xx evm: Update secure_emif_sdram_config during ddr init
This patch updates secure_emif_sdram_config with the
same value written to sdram_config during ddr3 initialization.
During suspend/resume, this value is copied into sdram_config.
With this, a write to sdram_config at the end of resume sequence
which triggers an init sequence can be avoided.
Without this register write in place, the DDR_RESET line goes
low for a few cycles during resume which is a violation of the
JEDEC spec.
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
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| H A D | cpu.h | 6995a2893718a54cbd255ea3dd9b6d7306e30cf2 Thu Aug 09 18:29:57 UTC 2012 Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> am33xx evm: Update secure_emif_sdram_config during ddr init
This patch updates secure_emif_sdram_config with the
same value written to sdram_config during ddr3 initialization.
During suspend/resume, this value is copied into sdram_config.
With this, a write to sdram_config at the end of resume sequence
which triggers an init sequence can be avoided.
Without this register write in place, the DDR_RESET line goes
low for a few cycles during resume which is a violation of the
JEDEC spec.
Signed-off-by: Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com>
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