Searched hist:"653 fc38026d223bd111a57826e169edef36c6486" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/include/t194/ |
| H A D | tegra194_private.h | 653fc38026d223bd111a57826e169edef36c6486 Fri Nov 10 21:23:34 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra194: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/ |
| H A D | plat_secondary.c | 653fc38026d223bd111a57826e169edef36c6486 Fri Nov 10 21:23:34 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra194: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | plat_trampoline.S | 653fc38026d223bd111a57826e169edef36c6486 Fri Nov 10 21:23:34 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra194: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | plat_psci_handlers.c | 653fc38026d223bd111a57826e169edef36c6486 Fri Nov 10 21:23:34 UTC 2017 Varun Wadekar <vwadekar@nvidia.com> Tegra194: helper functions for CPU rst handler and SMMU ctx offset
This patch adds a helper function to get the SMMU context's offset
and uses another helper function to get the CPU trampoline offset.
These helper functions are used by the System Suspend entry sequence
to save the SMMU context and CPU reset handler to TZDRAM.
Change-Id: I95e2862fe37ccad00fa48ec165c6e4024df01147
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|