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/optee_os/core/arch/riscv/kernel/
H A Dentry.S63bfec5e264b66c00bfc1b6ba807ec0f75495891 Sat Mar 02 16:03:20 UTC 2024 Alvin Chang <alvinga@andestech.com> core: riscv: Apply SM-based boot flow for secondary harts

When the system adopts M-mode secure monitor based solution, the
secondary harts need to hand over the control back to the secure
monitor after the initial boot sequence. Add related code for this
purpose.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Marouene Boubakri <marouene.boubakri@nxp.com>