Searched hist:"638 a05894169b07ea8f6d21b6925ca353ea6ebb7" (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/arch/x86/dts/ |
| H A D | bayleybay.dts | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 Mon Oct 12 04:37:44 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| H A D | minnowmax.dts | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 Mon Oct 12 04:37:44 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /rk3399_rockchip-uboot/configs/ |
| H A D | bayleybay_defconfig | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 Mon Oct 12 04:37:44 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| H A D | minnowmax_defconfig | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 Mon Oct 12 04:37:44 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|
| /rk3399_rockchip-uboot/doc/ |
| H A D | README.x86 | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 Mon Oct 12 04:37:44 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
|