Searched hist:"61 eae524b6e452fd1be931c6e1ff8f7cf3ae969c" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/psci/ |
| H A D | psci_private.h | 61eae524b6e452fd1be931c6e1ff8f7cf3ae969c Tue Jun 28 15:46:15 UTC 2016 Achin Gupta <achin.gupta@arm.com> Fix use of stale power states in PSCI standby finisher
A PSCI CPU_SUSPEND request to place a CPU in retention states at power levels
higher than the CPU power level is subject to the same state coordination as a
power down state. A CPU could implement multiple retention states at a
particular power level. When exiting WFI, the non-CPU power levels may be in a
different retention state to what was initially requested, therefore each CPU
should refresh its view of the states of all power levels.
Previously, a CPU re-used the state of the power levels when it entered the
retention state. This patch fixes this issue by ensuring that a CPU upon exit
from retention reads the state of each power level afresh.
Change-Id: I93b5f5065c63400c6fd2598dbaafac385748f989
|
| H A D | psci_suspend.c | 61eae524b6e452fd1be931c6e1ff8f7cf3ae969c Tue Jun 28 15:46:15 UTC 2016 Achin Gupta <achin.gupta@arm.com> Fix use of stale power states in PSCI standby finisher
A PSCI CPU_SUSPEND request to place a CPU in retention states at power levels
higher than the CPU power level is subject to the same state coordination as a
power down state. A CPU could implement multiple retention states at a
particular power level. When exiting WFI, the non-CPU power levels may be in a
different retention state to what was initially requested, therefore each CPU
should refresh its view of the states of all power levels.
Previously, a CPU re-used the state of the power levels when it entered the
retention state. This patch fixes this issue by ensuring that a CPU upon exit
from retention reads the state of each power level afresh.
Change-Id: I93b5f5065c63400c6fd2598dbaafac385748f989
|
| H A D | psci_common.c | 61eae524b6e452fd1be931c6e1ff8f7cf3ae969c Tue Jun 28 15:46:15 UTC 2016 Achin Gupta <achin.gupta@arm.com> Fix use of stale power states in PSCI standby finisher
A PSCI CPU_SUSPEND request to place a CPU in retention states at power levels
higher than the CPU power level is subject to the same state coordination as a
power down state. A CPU could implement multiple retention states at a
particular power level. When exiting WFI, the non-CPU power levels may be in a
different retention state to what was initially requested, therefore each CPU
should refresh its view of the states of all power levels.
Previously, a CPU re-used the state of the power levels when it entered the
retention state. This patch fixes this issue by ensuring that a CPU upon exit
from retention reads the state of each power level afresh.
Change-Id: I93b5f5065c63400c6fd2598dbaafac385748f989
|