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/rk3399_rockchip-uboot/include/
H A Dfsl_ddr_sdram.h5fc62fe57097e195a8047859cd3c278a5d6790b6 Wed Mar 16 05:50:23 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> driver/ddr/fsl: Add workaround for erratum A-009801

The initial training for the DDRC may provide results that are not
optimized. The workaround provides better read timing margins.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
/rk3399_rockchip-uboot/drivers/ddr/fsl/
H A Dfsl_ddr_gen4.c5fc62fe57097e195a8047859cd3c278a5d6790b6 Wed Mar 16 05:50:23 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> driver/ddr/fsl: Add workaround for erratum A-009801

The initial training for the DDRC may provide results that are not
optimized. The workaround provides better read timing margins.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dconfig.h5fc62fe57097e195a8047859cd3c278a5d6790b6 Wed Mar 16 05:50:23 UTC 2016 Shengzhou Liu <Shengzhou.Liu@nxp.com> driver/ddr/fsl: Add workaround for erratum A-009801

The initial training for the DDRC may provide results that are not
optimized. The workaround provides better read timing margins.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>