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| /rk3399_rockchip-uboot/drivers/fpga/ |
| H A D | zynqpl.c | 5f93227ce02d9cafa11704c807a80dcbde129f8c Sat Jun 15 00:43:24 UTC 2013 Soren Brinkmann <soren.brinkmann@xilinx.com> fpga: zynqpl: Clear loopback mode during device init
Some versions of the Zynq first stage boot loader enable PCAP loopback
during boot regardless of whether or not the boot image includes PL
configuration. This behavior only appears in certain boot modes (notably
QSPI boot). Attempting to configure the PL with the loopback bit set
will result in timeouts and will prevent successful configuration.
In order to avoid this problem, and to avoid dependency on the version
of the FSBL used to boot the system, ensure that the loopback enable bit
is cleared when loading the driver.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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