Searched hist:"50 cf3d17ce021fc6156d41abfbaa5490e8238c3b" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/ |
| H A D | tlb.c | 50cf3d17ce021fc6156d41abfbaa5490e8238c3b Tue Nov 01 03:13:26 UTC 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Add support for Book-E MMU Arch v2.0
A few of the config registers changed definition between MMU v1.0 and MMUv2.0. The new e6500 core from Freescale implements v2.0 of the architecture.
Specifically, how we determine the size of TLB entries we support in the variable size (or TLBCAM/TLB1) array is specified in a new register (TLBnPS - TLB n Page size) instead of via TLBnCFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| /rk3399_rockchip-uboot/arch/powerpc/include/asm/ |
| H A D | processor.h | 50cf3d17ce021fc6156d41abfbaa5490e8238c3b Tue Nov 01 03:13:26 UTC 2011 Kumar Gala <galak@kernel.crashing.org> powerpc/85xx: Add support for Book-E MMU Arch v2.0
A few of the config registers changed definition between MMU v1.0 and MMUv2.0. The new e6500 core from Freescale implements v2.0 of the architecture.
Specifically, how we determine the size of TLB entries we support in the variable size (or TLBCAM/TLB1) array is specified in a new register (TLBnPS - TLB n Page size) instead of via TLBnCFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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