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H A Dvf610twr.c4b8cdd484c51bb05b47cc83c634ba4a4043aa997 Fri Oct 09 20:38:39 UTC 2015 Anthony Felice <tony.felice@timesys.com> vf610twr: Fix typo in DRAM init

This commit fixes a typo in vf610twr DRAM init that was causing a hang in
U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc
(vf610: refactor DDRMC code).

Signed-off-by: Anthony Felice <tony.felice@timesys.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>