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/rk3399_ARM-atf/plat/nvidia/tegra/common/
H A Dtegra_fiq_glue.c45eab456e6da0e79c51ffced6c3a46053a1adc70 Fri May 20 23:21:22 UTC 2016 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1

This patch modifies the secure IRQ registration process to allow platforms
to specify the target CPUs as well as the owner of the IRQ. IRQs "owned"
by the EL3 would return INTR_TYPE_EL3 whereas those owned by the Trusted
OS would return INTR_TYPE_S_EL1 as a result.

Change-Id: I528f7c8220d0ae0c0f354e78d69e188abb666ef6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
/rk3399_ARM-atf/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h45eab456e6da0e79c51ffced6c3a46053a1adc70 Fri May 20 23:21:22 UTC 2016 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1

This patch modifies the secure IRQ registration process to allow platforms
to specify the target CPUs as well as the owner of the IRQ. IRQs "owned"
by the EL3 would return INTR_TYPE_EL3 whereas those owned by the Trusted
OS would return INTR_TYPE_S_EL1 as a result.

Change-Id: I528f7c8220d0ae0c0f354e78d69e188abb666ef6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
/rk3399_ARM-atf/plat/nvidia/tegra/include/
H A Dtegra_private.h45eab456e6da0e79c51ffced6c3a46053a1adc70 Fri May 20 23:21:22 UTC 2016 Varun Wadekar <vwadekar@nvidia.com> Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1

This patch modifies the secure IRQ registration process to allow platforms
to specify the target CPUs as well as the owner of the IRQ. IRQs "owned"
by the EL3 would return INTR_TYPE_EL3 whereas those owned by the Trusted
OS would return INTR_TYPE_S_EL1 as a result.

Change-Id: I528f7c8220d0ae0c0f354e78d69e188abb666ef6
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>