Searched hist:"43 dd22f5fc4c368616721a69e5ea0769abf292dc" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/arch/x86/include/asm/ |
| H A D | mtrr.h | 43dd22f5fc4c368616721a69e5ea0769abf292dc Mon Jul 06 08:31:30 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Setup fixed range MTRRs for legacy regions
We should setup fixed range MTRRs for some legacy regions like VGA
RAM and PCI ROM areas as uncacheable. Note FSP may setup these to
other cache settings, but we can override this in x86_cpu_init_f().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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| /rk3399_rockchip-uboot/arch/x86/cpu/ |
| H A D | cpu.c | 43dd22f5fc4c368616721a69e5ea0769abf292dc Mon Jul 06 08:31:30 UTC 2015 Bin Meng <bmeng.cn@gmail.com> x86: Setup fixed range MTRRs for legacy regions
We should setup fixed range MTRRs for some legacy regions like VGA
RAM and PCI ROM areas as uncacheable. Note FSP may setup these to
other cache settings, but we can override this in x86_cpu_init_f().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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