Searched hist:"413 d2f55e56ba99d41e2cda1d54c27bd6603a3bf" (Results 1 – 2 of 2) sorted by relevance
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| H A D | PX30MINIALL_SLC.ini | 413d2f55e56ba99d41e2cda1d54c27bd6603a3bf Mon Jan 11 10:00:26 UTC 2021 Zhihuan He <huan.he@rock-chips.com> px30: ddr: update ddr bin to v1.16
build from:
2f76446 rk3326/px30: ddr: updata to v1.16 20210528
update feature:
69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
1e8bea7 rk3326/px30: ddr: add support ssmod
8c20176 rk3326/px30: ddr: add DPLL power down and up
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id1b3ff152a756cd18acb00a65482127063bcb541
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| H A D | PX30MINIALL.ini | 413d2f55e56ba99d41e2cda1d54c27bd6603a3bf Mon Jan 11 10:00:26 UTC 2021 Zhihuan He <huan.he@rock-chips.com> px30: ddr: update ddr bin to v1.16
build from:
2f76446 rk3326/px30: ddr: updata to v1.16 20210528
update feature:
69540a9 rk3326/px30: ddr: fix DDR4 MR6 tccd_L err
14551bb rk3326/px30: ddr: fix MR0 tWR err in low freq
6f6714e rk3326/px30: ddr: limit max ddr.bin size to 10KB
1e8bea7 rk3326/px30: ddr: add support ssmod
8c20176 rk3326/px30: ddr: add DPLL power down and up
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: Id1b3ff152a756cd18acb00a65482127063bcb541
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