Searched hist:"3 e057e48b5046a2a3478fdc697bbe959b51bc156" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_rockchip-uboot/configs/ |
| H A D | Merrii_A80_Optimus_defconfig | 3e057e48b5046a2a3478fdc697bbe959b51bc156 Fri Oct 28 10:21:37 UTC 2016 Chen-Yu Tsai <wens@csie.org> sunxi: Enable SPL support for A80 Optimus board
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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| /rk3399_rockchip-uboot/board/sunxi/ |
| H A D | MAINTAINERS | 3e057e48b5046a2a3478fdc697bbe959b51bc156 Fri Oct 28 10:21:37 UTC 2016 Chen-Yu Tsai <wens@csie.org> sunxi: Enable SPL support for A80 Optimus board
The A80 Optimus Board was launched with the Allwinner A80 SoC.
It was jointly developed by Allwinner and Merrii.
This board has a UART port, a JTAG connector, 2 USB host ports, a USB
3.0 OTG connector, an HDMI output, a micro SD slot, 16G eMMC flash,
2G DRAM, a camera sensor interface, a WiFi/BT combo chip, a headphone
jack, IR receiver, and additional GPIO headers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: update existing Merrii_A80_Optimus_defconfig
instead of adding a new defconfig]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
|