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| H A D | jr.c | 3a4800a5968f689788d70f7decb000a3d3e1a2f4 Tue Dec 08 08:24:30 UTC 2015 Aneesh Bansal <aneesh.bansal@freescale.com> drivers/crypto/fsl: fix endianness issue in RNG
For Setting and clearing the bits in SEC Block registers
sec_clrbits32() and sec_setbits32() are used which work as
per endianness of CAAM block.
So these must be used with SEC register address as argument.
If the value is read in a local variable, then the functions
will not behave correctly where endianness of CAAM and core is
different.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
CC: Alex Porosanu <alexandru.porosanu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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