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| H A D | RK3566TRUST_ULTRA.ini | 3681c3b8f105aea8799bc4fc9f50e816f0ab3996 Sat May 08 06:20:46 UTC 2021 Joseph Chen <chenjh@rock-chips.com> rk3568: bl31 ultra: update version to v2.03
Build from:
6b10c1bb5 plat: rk3568: put status info in ultra_info()
Update features:
6b10c1bb5 plat: rk3568: put status info in ultra_info()
b834819eb plat: rk3568: disable pclk_stimer clk when VD_LOGIC keep on
34585499d plat: rk3568: disable gpio2B input_enable for reduce power dissipation
8104e1d0f plat: rk3568: keep osc 24M on lite sleep only
f191f5d49 plat: rk3568: keep vd_logic on lite sleep only
ae0d3958f plat: rk3568: adjust npu pvtpll config
b86e22653 plat: rk3568: dmc: set ddr clock in phase when suspend
4f2434ad5 plat: rk3568: save/restore the clock gate contol
5803d89e7 plat: rk3568: add core_dbgprcr_pwrdown_wfi() for common
d17c40da3 plat: rk3568: dmc: setting clk_msch_div base on DPLL
405a815fd plat: rk3568: dmc: ignore CRU_DPLL_CON1.dsmpd when dfs
a5f3cd0d1 plat: rk3568: add ddr ecc support
1e9739b4e plat: rk3568: fix typo
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I36c4f37e80520556eaf04dd105e971de8e1ab2d6
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