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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_psci_handlers.c | 322b00fcfb6e8b1b5aa533c9503955c0bfdf826b Sat Sep 03 02:30:22 UTC 2016 Mustafa Yigit Bilgen <mbilgen@nvidia.com> Tegra186: clean CPU wake times from L2 cache
When entering C7, ATF disables caches and flushes the L1 cache. However,
wake_time[cpu] can still remain in the L2 cache, causing later reads to it
to fetch from DRAM. This will read stale values.
Fix this by aligning wake_time[cpu] to cache lines, and explicitly cleaning it
before disabling caches.
Change-Id: Id73d095b479677595a6b3dd0abb240a1fef5f311
Signed-off-by: Mustafa Yigit Bilgen <mbilgen@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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