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/rk3399_rockchip-uboot/arch/arm/cpu/armv8/
H A Dstart.S2ea3a448ccfdd3d6f7e01060ba8fa49bd97a73e0 Wed Jan 27 12:39:32 UTC 2016 Ashish kumar <Ashish.kumar@nxp.com> armv8: ls2080a: Implement workaround for core errata 829520, 833471

829520: Code bounded by indirect conditional branch might corrupt
instruction stream.
Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect
Predictor.

833471: VMSR FPSCR functional failure or deadlock.
Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dconfig.h2ea3a448ccfdd3d6f7e01060ba8fa49bd97a73e0 Wed Jan 27 12:39:32 UTC 2016 Ashish kumar <Ashish.kumar@nxp.com> armv8: ls2080a: Implement workaround for core errata 829520, 833471

829520: Code bounded by indirect conditional branch might corrupt
instruction stream.
Workaround: Set CPUACTLR_EL1[4] = 1'b1 to disable the Indirect
Predictor.

833471: VMSR FPSCR functional failure or deadlock.
Workaround: Set CPUACTLR[38] to 1, which forces FPSCR write flush.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>