Searched hist:"2 d696d1811a370c742b69cf6442144d906a91d8c" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/plat/arm/board/arm_fpga/ |
| H A D | fpga_def.h | 2d696d1811a370c742b69cf6442144d906a91d8c Mon Dec 02 13:33:40 UTC 2019 Oliver Swede <oli.swede@arm.com> plat/arm/board/arm_fpga: Initialize the System Counter
This sets the frequency of the system counter so that the Delay Timer
driver programs the correct value to CNTCRL. This value depends on
the FPGA image being used, and is 10MHz for the initial test image.
Once configured, the BL31 platform setup sequence then enables the
system counter.
Signed-off-by: Oliver Swede <oli.swede@arm.com>
Change-Id: Ieb036a36fd990f350b5953357424a255b8ac5d5a
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| H A D | fpga_bl31_setup.c | 2d696d1811a370c742b69cf6442144d906a91d8c Mon Dec 02 13:33:40 UTC 2019 Oliver Swede <oli.swede@arm.com> plat/arm/board/arm_fpga: Initialize the System Counter
This sets the frequency of the system counter so that the Delay Timer
driver programs the correct value to CNTCRL. This value depends on
the FPGA image being used, and is 10MHz for the initial test image.
Once configured, the BL31 platform setup sequence then enables the
system counter.
Signed-off-by: Oliver Swede <oli.swede@arm.com>
Change-Id: Ieb036a36fd990f350b5953357424a255b8ac5d5a
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