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| H A D | entry.S | 29661368f51dc258d8c3f83dc0e53e9e3c9081b4 Sun Jun 01 09:43:56 UTC 2025 Yu-Chien Peter Lin <peter.lin@sifive.com> core: riscv: preserve hartid in s0 register at entry point
The hartid is initially passed in a0 register. Since we
will introduce function calls in subsequent patches and
a0 is caller-saved per RISC-V calling convention, preserve
the hart ID in s0 (callee-saved) to avoid unnecessary
save-restore operations when making function calls.
Also, use temporary registers instead in set_tp, makes
it more consistent with set_sp.
Signed-off-by: Yu-Chien Peter Lin <peter.lin@sifive.com>
Suggested-by: Alvin Chang <alvinga@andestech.com>
Reviewed-by: Alvin Chang <alvinga@andestech.com>
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