Home
last modified time | relevance | path

Searched hist:"27 c9596f680ecea01beb52181da72b7d7fab0d8c" (Results 1 – 2 of 2) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/include/asm/arch-omap5/
H A Dclock.h27c9596f680ecea01beb52181da72b7d7fab0d8c Mon May 23 18:32:15 UTC 2016 Anna, Suman <s-anna@ti.com> ARM: DRA7: Define common macros for efuse register offsets

Define a set of common macros for the efuse register offsets
(different for each OPP) that are used to get the AVS Class 0
voltage values and ABB configuration values. Assign these
common macros to the register offsets for OPP_NOM by default
for all voltage domains. These common macros can then be
redefined properly to point to the OPP specific efuse register
offset based on the desired OPP to program a specific voltage
domain.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
/rk3399_rockchip-uboot/board/ti/am57xx/
H A Dboard.c27c9596f680ecea01beb52181da72b7d7fab0d8c Mon May 23 18:32:15 UTC 2016 Anna, Suman <s-anna@ti.com> ARM: DRA7: Define common macros for efuse register offsets

Define a set of common macros for the efuse register offsets
(different for each OPP) that are used to get the AVS Class 0
voltage values and ABB configuration values. Assign these
common macros to the register offsets for OPP_NOM by default
for all voltage domains. These common macros can then be
redefined properly to point to the OPP specific efuse register
offset based on the desired OPP to program a specific voltage
domain.

Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>